Center European Research Science informatics

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Welcome to Center European Research Science informatics

Cersi! Mos 1.0

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The Center European of Research Science Informatics was founded on 01 December 1999, Geneva, Switzerland by Prof. W.M. HORSTMANN. With one major Objective! The advancement of Computer Science & Software Engineering.

This Research center under leadership of Chief Scientific Prof. W.M. HORSTMANN, has developed Mos64 1.0,  were as MOS stands for Multi Operating System and that€'s precisely what it is ! It run all UNIX, Linux, Mac OSX, Microsoft XX, Atari, PSII & PSIII, Nintendo name it it is! It is just unbelievably fast, EXTREMELY SECURE and runs up-to 15 times Faster (on net-books constructed for Microsoft 7x)than Microsoft 7x it self's! Iovu Mos64 1.0, Euro Mos64 1.0, Swiss Mos64 1.0, Una Mos64 1.0 and French Mos64 1.0 are just some of the Distributions using Mos64 1.0 Kernel! Our Research Team strives to develop a multitude of software packages to render Mos64 1.0 more powerful and User satisfying ! €œAll Commercial Software has a Free Software solution equals or better  than your dreadfully paid Software!€ says Prof. W.M. HORSTMANN. Our Research & Development team has just completed a tedious job of over 226(mostly 2D & 3D Graphics)games a must for any OS.

The MOS Difference

CERSI is a non-profit organization dedicated to keeping the power of the OS in peoples hands. We're a global organization of users, contributors, developers and scientist's working to innovate on your behalf. When you use Mos, you become a part of that organization, helping us build a brighter future for the Worlds Fastest and most Secure Operating System. We present you : Cirsi Mos All in One PC (21") (HMT2160AGOS)

Product Description
Model HMT2160AGOS; Display Size 21.6 inch; Resolution 1360*768@60Hz or 1920*1080 Display Ratio 16: 9; Mother Board Intel G41+ICH7; CPU Intel Atom@ Dual Core HT E5500 2.8Hz; Memory DDR2-800, 2GB and above; Hard Disk S-ATAII 250GB/500GB/8MB/7200rpm; Graphic Card Intel Graphics Media Accelerator 3150; Network Card 1000M(Built-in wireless card); Audio Card (Realtek HD audio output) audio system; Input/Output USB2.0*4 / AUDIO / EARPHONE / MIC /RJ45 LAN / SD, MMC, MS / VGA / HDMI; Operating System:  Mos64 atom version 1.0
Model NO.: HMT2160AGOS
Unit Price: Negotiable
Shipment Terms: FOB
Payment Terms: L/C,T/T
Minimum Order: 20 Pieces
Price Valid Time: From Nov 04,2012 To Aug 04,2013
Memory Capacity: 2GB
CPU: Core Duo
HDD Capacity: 500GB
Display Screen Size: 22"
Display Type: LCD
Export Markets: North America, South America, Eastern Europe, Southeast Asia, Africa, Oceania, Mid East, Eastern Asia, Western Europe
Last Updated on Tuesday, 13 January 2015 11:42

We are Volunteers

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The Cersi Mos Core Team and Working Group members are volunteer developers, designers, administrators and managers who have worked together to take Cersi! to new heights in its relatively short life. Cersi! has some wonderfully talented people taking Open Source concepts to the forefront of industry standards.Cersi Mos! 1.0 is a major leap forward and represents the most exciting Cersi! release in the history of the project.

Last Updated on Friday, 22 February 2013 17:50

Cersi! Architecture Guidelines

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Here are the architecture that Mos 1.0 currently covers(Have Mos 1.0 and Software for all of this architectures) !!!

  • Mos32 and Mos64: (included Intel architecture amd, amd64 and Intel based Mac OSX), NB: since 01-01-2006 all Mac OSX are Intelbase
  • Mos390: S390 (Main Frames architecture),
  • MosIntosh:  Mac OSX (PPC),NB All Mac OSX build before 31-12-2005 are PowerPC or PPC
  • MosARM: ARM

Mos32 and Mos64: (included Intel architecture amd, amd64 and Intel based Mac OSX), most computers used based on this !!!

S/390 &€“ ESA/390 (Enterprise Systems Architecture/390) Was Introduced in September 1990 [1] and IS IBM’s last mainframe 31-bit-address/32-bit-data computing design, copied by Amdahl, Hitachi, and Fujitsu Among Other Competitors. It Was the Successor of System/370 and has-been by the SUCCEEDED 64-bit z / Architecture in 2000. Machines Have Been Supporting the architecture sold from under the brand System/390 (S/390) from The Beginning of the 1990s. The 9672 implementations of System/390 Were the first high-end IBM mainframe architecture Implemented first with CMOS CPU electronics Rather Than the traditional bipolar logic.Computing1

PowerPC, sometimes abbreviated PPC, is a family of microprocessors derived from POWER RISC processor architecture of IBM, and developed jointly by Apple, IBM and Freescale (formerly Motorola Semiconductors). The reverse acronym for PowerPC Performance Optimization With Enhanced is RISC Performance!

ARM platforms supported Out of the box, ARM Mos officially supports two systems: ARM Versatile platform (via QEMU emulator) Marvell SoC (System on Chip), including: SheevaPlug (original & eSATA) GuruPlug OpenRD based, client and Ultimate. Minimum target CPU Starting with Mos ARM 1.0, the packages are compiled for the target at least: ARMv4t Little Endian Softfloat EABI (version 4 +) This means that user-space works on most ARM devices on the market today.

SPARC Jump to: navigation, search SPARC The SPARC processor architecture is open. SPARC€ is the reverse acronym for Scalable Processor Architecture (€œscalable processor architecture€). It is RISC, favoring pipeline reduced instruction set. This architecture supports in 1995 and addresses the data memory 64-bit. The first SPARC microprocessors were developed at Berkeley in 1984. The evolution of the architecture is decided by SPARC International, grouping including Sun Microsystems, Fujitsu and Texas Instruments. There are three versions of this architecture: SPARC V7: appeared around 1987, 32-bit architecture SPARC V8 appeared around 1991, 32-bit architecture SPARC V9: appeared around 1994, 64-bit architecture SPARC is an architecture whose specifications are free, providing the freedom for anyone to create a compatible processor. A processor uses the completely free SPARC V8 instruction set: the LEON. It is licensed under the LGPL by the FSF. The SPARC V7 also led the development of the ERC32 processor, radiation tolerant and used in space.

Last Updated on Friday, 22 February 2013 08:52

Cersi! Security Strike Team

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The Mos! Project has assembled a top-notch team of experts to form the new Cersi! Security Strike Team. This new team will solely focus on investigating and resolving security issues. Instead of working in relative secrecy, the CSST will have a strong public-facing presence at the Cersi! Security Center.

Last Updated on Friday, 22 February 2013 09:35

IPv4 to IPv6

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Mos 1.0, move over from IPv4 to IPv6

Prof. Wayne Marshall HORSTMANN, finally decided to pas our OS to IPv6!  Mos 1.0, now covers not only all major architecture but all major operating systems as well !!!


IPv4 is the first version of Internet Protocol (IP) have been widely deployed, and in 2011 still forms the basis of the Internet. It is described in RFC 791 in September 1981. Each IPv4 interface of a host is assigned one or more IP addresses encoded on 32 bits. Up to 4,294,967,296 (or 232) addresses can be allocated simultaneously in theory (in practice, a number can not be used). The exhaustion of IPv4 addresses has led to the development of a new version of IP, IPv6, and transition from IPv4 to IPv6 in order to adopt this new version. The lack of IPv4 address is initially bypassed through the use of techniques address translation (NAT) as well as the adoption of CIDR system. The number of public IP Version 4 officially arrived saturation February 3, 2011.


IPv6 (Internet Protocol version 6) is a connectionless network protocol layer 3 of the OSI model. IPv6 is the culmination of the work within the IETF in the 1990s as the successor to IPv4 and specifications were finalized in RFC 2460 in December 1998. With 128-bit addresses instead of 32 bits, IPv6 has an address space much larger IPv4. This amount of addresses allows considerably greater flexibility in allocating addresses and better aggregation of routes in the routing table of the Internet. Address translation, which was made popular by the lack of IPv4 addresses, no longer needed. IPv6 also provides mechanisms for automatic address assignment and renumbering easier. The size of the subnet, IPv4 variable was set to 64 bits in IPv6. Security mechanisms such as IPsec are part of basic specifications of the protocol. The header of the IPv6 packet has been simplified and the types of local addresses facilitate the interconnection of private networks. The deployment of IPv6 on the Internet is complicated because of the incompatibility of IPv4 and IPv6. Address translators automatic face significant practical problems (RFC 49661). During a transition phase where IPv6 and IPv4 coexist, guests have a dual-stack, that is to say, they have both IPv4 and IPv6 addresses, and tunnels can traverse groups routers that do not yet support IPv6. In 2010, the deployment of IPv6 is still limited, the proportion of Internet users in IPv6 is estimated between 0.25 and 2.3 1%, in spite of urgent appeals addressed to accelerate the migration to the suppliers of Internet access and content providers from the Regional Internet Registries and ICANN, the exhaustion of public IPv4 addresses available are imminent.

Last Updated on Friday, 22 February 2013 20:08

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PACKAGE NAME:     lshw-B.02.16-x86_64-1mos

lshw: lshw (Hardware Lister)
lshw: lshw (Hardware Lister) is a small tool to provide detailed information
lshw: on the hardware configuration of the machine. It can report exact
lshw: memory configuration, firmware version, mainboard configuration, CPU
lshw: version and speed, cache configuration, bus speed, etc. on
lshw: DMI-capable x86 or EFI (IA-64) systems and on some PowerPC machines
lshw: (PowerMac G4 is known to work).